1. Field
This disclosure relates generally to semiconductor memory cells, and more particularly, to non-volatile memory (NVM) cells.
2. Related Art
Non-volatile memories (NVMs) have a limited endurance and efforts are continually being made to improve endurance. Improvements are being made in life-extending techniques using improved circuit design and in improved manufacturing techniques. One of the problems is what is known as trap-up in which charge becomes trapped in a dielectric and the charge is not readily moved by typical program and erase techniques. The result is that the threshold voltage for an erased device, which is the relatively high conductivity state, increases with the trap-up accumulation due to usage. The threshold voltage for a programmed device, which is the relatively low conductivity state, also increases with trap-up accumulation but much less than the increase in threshold for erased devices of the same usage. The result ultimately is that the high and low conductivity states become too close together for reliable detection, especially at higher speeds.
Accordingly there is a need to provide further improvement in reducing trap-up in NVMs.